Solar cell fabrication using laser patterning of ion-implanted etch-resistant layers and the resulting solar cells

ABSTRACT

Solar cell fabrication using laser patterning of ion-implanted etch-resistant layers, and the resulting solar cells, are described. In an example, a back contact solar cell includes an N-type single crystalline silicon substrate having a light-receiving surface and a back surface. Alternating continuous N-type emitter regions and segmented P-type emitter regions are disposed on the back surface of the N-type single crystalline silicon substrate, with gaps between segments of the segmented P-type emitter regions. Trenches are included in the N-type single crystalline silicon substrate between the alternating continuous N-type emitter regions and segmented P-type emitter regions and in locations of the gaps between segments of the segmented P-type emitter regions. An approximately Gaussian distribution of P-type dopants is included in the N-type single crystalline silicon substrate below the segmented P-type emitter regions. A maximum concentration of the approximately Gaussian distribution of P-type dopants is approximately in the center of each of the segmented P-type emitter regions between first and second sides of each of the segmented P-type emitter regions. Substantially vertical P/N junctions are included in the N-type single crystalline silicon substrate at the trenches formed in locations of the gaps between segments of the segmented P-type emitter regions.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No.14/971,846, filed on Dec. 16, 2015, the entire contents of which arehereby incorporated by reference herein.

TECHNICAL FIELD

Embodiments of the present disclosure are in the field of renewableenergy and, in particular, solar cell fabrication using laser patterningof ion-implanted etch-resistant layers, and the resulting solar cells.

BACKGROUND

Photovoltaic cells, commonly known as solar cells, are well knowndevices for direct conversion of solar radiation into electrical energy.Generally, solar cells are fabricated on a semiconductor wafer orsubstrate using semiconductor processing techniques to form a p-njunction near a surface of the substrate. Solar radiation impinging onthe surface of, and entering into, the substrate creates electron andhole pairs in the bulk of the substrate. The electron and hole pairsmigrate to p-doped and n-doped regions in the substrate, therebygenerating a voltage differential between the doped regions. The dopedregions are connected to conductive regions on the solar cell to directan electrical current from the cell to an external circuit coupledthereto.

Efficiency is an important characteristic of a solar cell as it isdirectly related to the capability of the solar cell to generate power.Likewise, efficiency in producing solar cells is directly related to thecost effectiveness of such solar cells. Accordingly, techniques forincreasing the efficiency of solar cells, or techniques for increasingthe efficiency in the manufacture of solar cells, are generallydesirable. Some embodiments of the present disclosure allow forincreased solar cell manufacture efficiency by providing novel processesfor fabricating solar cell structures. Some embodiments of the presentdisclosure allow for increased solar cell efficiency by providing novelsolar cell structures.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A-1C illustrate plan views of various stages in the fabricationof a solar cell, in accordance with an embodiment of the presentdisclosure.

FIG. 2 is a flowchart listing operations in a method of fabricating asolar cell as corresponding to FIGS. 1A-1C, in accordance with anembodiment of the present disclosure.

FIGS. 3A-3G illustrate cross-sectional views of various stages in thefabrication of a solar cell enhancing the description of FIGS. 1A-1C andFIG. 2, in accordance with an embodiment of the present disclosure.

FIG. 4 is a schematic illustrating a Gaussian profile associated with anion implant process, in accordance with an embodiment of the presentdisclosure.

FIG. 5A illustrates a cross-sectional view of a region of a solar cellalong a length of a segment 104′ of an emitter region of FIG. 1C, inaccordance with an embodiment of the present disclosure.

FIG. 5B illustrates a cross-sectional view of a region of a solar cellalong a scribed width 108′ between segments 104′ of an emitter region ofFIG. 1C, in accordance with an embodiment of the present disclosure.

FIG. 6A is an optical image of a plan view showing the gap betweenadjacent segments of an emitter region of FIG. 1C, in accordance with anembodiment of the present disclosure.

FIG. 6B is a scanning electron microscope (SEM) image showing a laserscribed edge and a non-laser scribed edge of an emitter region of asolar cell for comparative purposes, in accordance with an embodiment ofthe present disclosure.

FIG. 7A illustrates a plan view of an emitter line having no continuitybetween segments of the emitter line, in accordance with an embodimentof the present disclosure.

FIG. 7B illustrates a plan view of an emitter line having continuitybetween segments of the emitter line, in accordance with an embodimentof the present disclosure.

FIG. 8 is a flowchart listing operations in another method offabricating a solar cell, in accordance with an embodiment of thepresent disclosure.

FIG. 9 schematically illustrates a cross-sectional view of an inlineplatform for patterned implant involving a traveling wafer andstationary shadow mask, in accordance with an embodiment of the presentdisclosure.

DETAILED DESCRIPTION

The following detailed description is merely illustrative in nature andis not intended to limit the embodiments of the subject matter or theapplication and uses of such embodiments. As used herein, the word“exemplary” means “serving as an example, instance, or illustration.”Any implementation described herein as exemplary is not necessarily tobe construed as preferred or advantageous over other implementations.Furthermore, there is no intention to be bound by any expressed orimplied theory presented in the preceding technical field, background,brief summary or the following detailed description.

This specification includes references to “one embodiment” or “anembodiment.” The appearances of the phrases “in one embodiment” or “inan embodiment” do not necessarily refer to the same embodiment.Particular features, structures, or characteristics may be combined inany suitable manner consistent with this disclosure.

Terminology. The following paragraphs provide definitions and/or contextfor terms found in this disclosure (including the appended claims):

“Comprising.” This term is open-ended. As used in the appended claims,this term does not foreclose additional structure or steps.

“Configured To.” Various units or components may be described or claimedas “configured to” perform a task or tasks. In such contexts,“configured to” is used to connote structure by indicating that theunits/components include structure that performs those task or tasksduring operation. As such, the unit/component can be said to beconfigured to perform the task even when the specified unit/component isnot currently operational (e.g., is not on/active). Reciting that aunit/circuit/component is “configured to” perform one or more tasks isexpressly intended not to invoke 35 U.S.C. § 112, sixth paragraph, forthat unit/component.

“First,” “Second,” etc. As used herein, these terms are used as labelsfor nouns that they precede, and do not imply any type of ordering(e.g., spatial, temporal, logical, etc.). For example, reference to a“first” solar cell does not necessarily imply that this solar cell isthe first solar cell in a sequence; instead the term “first” is used todifferentiate this solar cell from another solar cell (e.g., a “second”solar cell).

“Coupled”—The following description refers to elements or nodes orfeatures being “coupled” together. As used herein, unless expresslystated otherwise, “coupled” means that one element/node/feature isdirectly or indirectly joined to (or directly or indirectly communicateswith) another element/node/feature, and not necessarily mechanically.

In addition, certain terminology may also be used in the followingdescription for the purpose of reference only, and thus are not intendedto be limiting. For example, terms such as “upper”, “lower”, “above”,and “below” refer to directions in the drawings to which reference ismade. Terms such as “front”, “back”, “rear”, “side”, “outboard”, and“inboard” describe the orientation and/or location of portions of thecomponent within a consistent but arbitrary frame of reference which ismade clear by reference to the text and the associated drawingsdescribing the component under discussion. Such terminology may includethe words specifically mentioned above, derivatives thereof, and wordsof similar import.

“Inhibit”—As used herein, inhibit is used to describe a reducing orminimizing effect. When a component or feature is described asinhibiting an action, motion, or condition it may completely prevent theresult or outcome or future state completely. Additionally, “inhibit”can also refer to a reduction or lessening of the outcome, performance,and/or effect which might otherwise occur. Accordingly, when acomponent, element, or feature is referred to as inhibiting a result orstate, it need not completely prevent or eliminate the result or state.

Solar cell fabrication using laser patterning of ion-implantedetch-resistant layers, and the resulting solar cells, are describedherein. In the following description, numerous specific details are setforth, such as specific process flow operations, in order to provide athorough understanding of embodiments of the present disclosure. It willbe apparent to one skilled in the art that embodiments of the presentdisclosure may be practiced without these specific details. In otherinstances, well-known fabrication techniques, such as lithography andpatterning techniques, are not described in detail in order to notunnecessarily obscure embodiments of the present disclosure.Furthermore, it is to be understood that the various embodiments shownin the figures are illustrative representations and are not necessarilydrawn to scale.

Disclosed herein are methods of fabricating solar cells. In oneembodiment, a method of fabricating an emitter region of a solar cellincludes forming a semiconductor layer above a semiconductor substrateof a first conductivity type. The method also includes implanting dopantimpurity atoms of a second conductivity type in the semiconductor layerto form an implanted region of the semiconductor layer and resulting ina non-implanted region of the semiconductor layer. The method alsoincludes laser scribing at least an uppermost portion of the implantedregion of the semiconductor layer to form scribe lines in the implantedregion of the semiconductor layer. The method also includes removing thenon-implanted region of the semiconductor layer and remaining portionsof the semiconductor layer in the scribe lines using a selective etchprocess preserving remaining non-scribed portions of the implantedregion of the semiconductor layer, the removing forming trenches in thesemiconductor substrate in locations below the non-implanted region ofthe semiconductor layer and in locations below the scribe lines. Themethod also includes annealing the semiconductor substrate to form anemitter region of the second conductivity type from the remainingnon-scribed portions of the implanted region of the semiconductor layerand to form a region of dopant impurity atoms of the second conductivitytype in the semiconductor substrate below the emitter region.

In another embodiment, a method of fabricating alternating N-type andP-type emitter regions of a solar cell includes forming a silicon layerabove an N-type single crystalline silicon substrate. The method alsoincludes forming, by ion implantation, alternating N-type and P-typelines in the silicon layer with non-implanted regions of the siliconlayer remaining between the alternating N-type and P-type lines. Themethod also includes breaking a continuity of the P-type lines using alaser scribing process to remove portions of the P-type lines and leaveremaining segmented P-type lines with gaps between segments of theP-type lines. The method also includes etching to remove thenon-implanted regions of the silicon layer remaining between thealternating N-type and P-type lines and in the gaps, the etching formingtrenches in the N-type single crystalline silicon substrate between thealternating N-type and P-type lines and in locations of the gaps betweensegments of the P-type lines. The method also includes, subsequent tothe etching, annealing the N-type single crystalline silicon substrateto form N-type emitter regions from the N-type lines and segmentedP-type emitter regions from the segmented P-type lines.

Also disclosed herein are solar cells. In one embodiment, a back contactsolar cell includes an N-type single crystalline silicon substratehaving a light-receiving surface and a back surface. Alternatingcontinuous N-type emitter regions and segmented P-type emitter regionsare disposed on the back surface of the N-type single crystallinesilicon substrate, with gaps between segments of the segmented P-typeemitter regions. Trenches are included in the N-type single crystallinesilicon substrate between the alternating continuous N-type emitterregions and segmented P-type emitter regions and in locations of thegaps between segments of the segmented P-type emitter regions. Anapproximately Gaussian distribution of P-type dopants is included in theN-type single crystalline silicon substrate below the segmented P-typeemitter regions. A maximum concentration of the approximately Gaussiandistribution of P-type dopants is approximately in the center of each ofthe segmented P-type emitter regions between first and second sides ofeach of the segmented P-type emitter regions. Substantially vertical P/Njunctions are included in the N-type single crystalline siliconsubstrate at the trenches formed in locations of the gaps betweensegments of the segmented P-type emitter regions.

One or more embodiments described herein involves use of ionimplantation to modify the etch resistance of amorphous or crystallinesilicon surfaces. For example, implanting with high doses of nitrogen orboron can form etch resistant B-rich silicon or silicon nitride layersrespectively. Ion implantation processes are typically patterned bydepositing and patterning hard mask materials prior to implant. In oneor more embodiments described herein, the arbitrary pattern generatingability of laser scanning ablation processes is exploited to patternimplanted films. In one such embodiment, following blanket or patternedion implantation, laser ablation is used to selectively remove areas ofetch resistant silicon. Subsequent etch operations are then implementedto define the desired features in the implanted layer.

To provide context, there is a need to have improved control over thepatterning of ion implanted etch resistant layers, for example for solarcell fabrication. Although ion-implant processes can involve patterningusing a shadow mask, such patterns are generally limited toone-dimension due to throughput considerations. The resultingone-dimensional patterns can be made, for example, by passing a waferunderneath a stationary mask. However, there are instances where atwo-dimensional pattern is preferred. In addition, due to the Gaussiandistribution of implanted dose across a one-dimensional (1D) feature,the implanted doping is often non-uniform. One consequence of lowerdoping at the edges of implant-defined features is less boronout-diffusion and, therefore, a less abrupt p-n junction at atrench/p-polysilicon interface resulting in a higher reverse breakdownvoltage. One approach to solve such an issue is to increase the overalldose. However, increasing the overall dose may not meet high volumeproduction needs in terms of processing throughput times. Anotherapproach is to adjust the mask pattern in order to increase the dose atthe edges of the lines. However, such masks are very challenging tofabricate and the design criteria for such masks is very stringent.

Addressing one or more of the above issues, in accordance with anembodiment of the present disclosure, laser patterning of implantedlines is implemented to allow the formation of trench/p-polysiliconjunctions at the center of the implanted line where there is a higherboron implant dose and higher out-diffusion. An overlapping pulsed laserscribe can be arbitrarily scanned across a wafer to ablate implantedetch stop regions (e.g., regions having a dopant concentration of etchresistant dopant impurity atoms). In a specific embodiment, a greenpicosecond pulsed laser is used with a power approximately in the rangeof around 2000-3000 W to ablate the etch stop area. After ablating theetch stop, etch/texturing procedures reveal the combined impact ofimplant and laser patterning. For example, the center of a cut linecontains the most implanted boron and, therefore, the mostout-diffusion. The end result may be a lowering of the breakdown voltagedue to a more abrupt p-n junction between the trench and p-polysiliconout-diffusion. One or more embodiments of the present disclosure enablethe use of lower cost high-throughput ion implant technology combinedwith high efficiency passivated contacts, while maintaining an industryleading reliability and shade performance through a low reversebreakdown voltage for the resulting cells.

In an exemplary process flow using implant induced etch selectivity,FIGS. 1A-1C illustrate plan views of various stages in the fabricationof a solar cell, in accordance with an embodiment of the presentdisclosure. FIG. 2 is a flowchart 200 listing operations in a method offabricating a solar cell as corresponding to FIGS. 1A-1C, in accordancewith an embodiment of the present disclosure. FIGS. 3A-3G illustratecross-sectional views of various stages in the fabrication of a solarcell enhancing the description of FIGS. 1A-1C and FIG. 2, in accordancewith an embodiment of the present disclosure.

Referring to FIG. 1A and corresponding operation 202 of flowchart 200, amethod of fabricating an emitter region of a solar cell includes forminga semiconductor layer 102 above a semiconductor substrate of a firstconductivity type (not shown). In a particular embodiment, FIG. 3Aillustrates a cross-sectional view illustrating a particular example ofFIG. 1A and operation 202 in which a silicon layer 306 is formed on athin oxide layer 304 disposed on a substrate 302.

Referring specifically to FIG. 3A, in an embodiment, the substrate 302is a monocrystalline silicon substrate, such as a bulk singlecrystalline N-type doped silicon substrate. It is to be appreciated,however, that substrate 302 may be a layer, such as a multi-crystallinesilicon layer, disposed on a global solar cell substrate. Referringagain to FIG. 3A, in an embodiment, as shown, a light receiving surface301 of the substrate 302 is texturized, as described in greater detailbelow. In an embodiment, the thin oxide layer 304 is a tunnel dielectricsilicon oxide layer having a thickness of approximately 2 nanometers orless. In an embodiment, the silicon layer 306 is an amorphous siliconlayer. In one such embodiment, the amorphous silicon layer is formedusing low pressure chemical vapor deposition (LPCVD) or plasma enhancedchemical vapor deposition (PECVD). However, in an alternativeembodiment, a polycrystalline silicon layer is used instead of amorphoussilicon.

Referring again to FIG. 1A and now to corresponding operation 204 offlowchart 200, the method of fabricating an emitter region of a solarcell also includes implanting dopant impurity atoms of a secondconductivity type in the semiconductor layer 102 to form an implantedregion 104 of the semiconductor layer 102 and resulting in anon-implanted region 106 of the semiconductor layer 102. In theembodiment shown in FIG. 1A, the pattern of dopants is a pattern ofone-dimensional (1D) lines. In a particular embodiment, FIGS. 3B-3Dillustrate cross-sectional views illustrating a particular example ofFIG. 1A and operation 204 in which dopant impurity species are implantedin the silicon layer 306 to form first implanted regions 308 andresulting in non-implanted regions 309 of the silicon layer (i.e.,remaining portions of silicon layer 306 that have not been implanted atthis stage in the process).

Referring specifically to FIG. 3B, in an embodiment, the implanting isperformed by using ion beam implantation or plasma immersionimplantation. In one embodiment, this first implanting provides N+dopant atoms for silicon (e.g., phosphorous or arsenic atoms). In aspecific such embodiment, implanting the phosphorous or arsenic atoms orions involves implanting to form a concentration of phosphorous orarsenic atoms in the silicon layer 306 approximately in the range of1E19-1E20 atoms/cm³. In an embodiment, the implanting is performedthrough a first shadow mask, an example of which is described inassociation with FIG. 9. Referring again to FIG. 3B, it is to beappreciated that the implanting may penetrate through silicon layer 306and through the thin oxide layer 304 to form diffusion regions 398.

Referring next to FIG. 3C, ancillary impurity species are implanted intothe first implanted regions 308 of the silicon layer 306. The ancillaryimpurity species are different from the dopant impurity species firstimplanted. Additionally, in an embodiment, the corresponding region ofthe ancillary impurity species are implanted to have a depth in thesilicon layer 306 less than the depth of the respective original firstimplanted region 308. As such, modified first implanted regions 308′ areformed and, in one embodiment, have lower portions 352 that arephosphorous (or arsenic)-only regions 352 and have upper portions 350that are regions of phosphorous (or arsenic) along with the ancillaryimpurity species, as is depicted in FIG. 3C. In an embodiment, theancillary impurity species implanted into the first implanted regionsare species such as, but not limited to, nitrogen atoms or ions, carbonatoms or ions, or oxygen atoms or ions. It is to be appreciated that theterm “ions” may include molecular ions containing one or more atoms ofthe dopant species bonded to additional hydrogen atoms. In oneembodiment, the ancillary impurity species is nitrogen and is providedby implantation using N₂ or NH₃. In one embodiment, the ancillaryimpurity species is carbon and is provided by implantation using CH₄ ora hydrocarbon such as acetylene or, possibly, methylsilane. In oneembodiment, the ancillary impurity species is oxygen and is provided byimplantation using N₂O or O₂. In an embodiment, the implanting isperformed by using ion beam implantation or plasma immersionimplantation. In one embodiment, this second implanting ultimatelyprovides nitrogen atoms, carbon atoms, or oxygen atoms in an upperportion of the N+ regions of the silicon layer 306. In a specific suchembodiment, implanting the second implanting form a concentration ofnitrogen, carbon or oxygen atoms in the silicon layer 306 approximatelyin the range of 1E19-1E21 atoms/cm³. In one embodiment, the distributionof the ancillary impurity species is localized predominately within thefirst 1000 Angstroms below the surface of the silicon layer 306. In anembodiment, the implanting is performed through a second shadow mask, anexample of which is described in association with FIG. 9.

Referring next to FIG. 3D, dopant impurity species of an oppositeconductivity type are implanted in the silicon layer 306 to form secondimplanted regions 310 and resulting in non-implanted regions 312 of thesilicon layer (i.e., remaining portions of the silicon layer 306 thatwere not significantly implanted during any of the above describedimplantation processes). As in the case for the first and secondimplantation processes, in an embodiment, the implanting is performed byusing ion beam implantation or plasma immersion implantation. In oneembodiment, this third implanting provides P+ dopant atoms for silicon(e.g., boron atoms). In a specific such embodiment, implanting the boronatoms or ions involves implanting to form a concentration of boron atomsin the silicon layer 306 approximately in the range of 1E19-1E20atoms/cm³. In an embodiment, the implanting is performed through a thirdshadow mask, an example of which is described in association with FIG.9. Referring again to FIG. 3D, it is to be appreciated that theimplanting may penetrate through silicon layer 306 and through the thinoxide layer 304 to form diffusion regions 399.

Referring now to FIG. 1B and to corresponding operation 206 of flowchart200, the method of fabricating an emitter region of a solar cell alsoincludes laser scribing at least an uppermost portion of the implantedregion 104 of the semiconductor layer 102 to form scribe lines 108 inthe implanted region 104 of the semiconductor layer 102. In anembodiment, the scribe lines 108 are formed by a pulsed laser ablationprocess that leaves non-continuous scribe lines across regions 104, asis depicted in FIG. 1B. In another embodiment, the scribe lines 108 areformed by a continuous or an overlapping pulsed laser process thatleaves continuous scribe lines across regions 104. In an embodiment, thescribe lines 108 are formed orthogonal to a pattern of 1D lines 104, asis depicted in FIG. 1B. In accordance with an embodiment of the presentdisclosure, the depth of laser ablation is sufficient to remove areas ofetch resistance layer across the line pattern 104.

Referring now to FIG. 1C and to corresponding operation 208 of flowchart200, the method of fabricating an emitter region of a solar cell alsoincludes removing the non-implanted region 106 (to form etched regions106′) of the semiconductor layer 102 and remaining portions of thesemiconductor layer 102 in the scribe lines 108 (to form etched regions108′). In an embodiment, the removing is performed using a selectiveetch process preserving remaining non-scribed portions 104′ of theimplanted region 104 of the semiconductor layer 102. In one embodiment,the removing forming trenches 106′ in the semiconductor substrate inlocations below the non-implanted region 106 of the semiconductor layer102 and in locations (e.g., in gaps) 108′ below the scribe lines 108. Assuch, in an embodiment, the etch process reveals a dashed line patternin the etch resistant ion implant layer. In an embodiment, the trenches106′ and gaps 108′ are texturized trenches formed in the semiconductorsubstrate, as is described in greater detail below. In one suchembodiment, the trenches 106′ and gaps 108′ are formed in thesemiconductor substrate using a hydroxide-based wet etchant, as is alsodescribed in greater detail below.

In a particular embodiment, FIG. 3E illustrates a cross-sectional viewillustrating a particular example of FIG. 1C and operation 208corresponding to the formation of etched regions 106′. Referring to FIG.3E, the remaining non-implanted regions 312 of the silicon layer 306 areremoved, for example with a selective etch process, preserving themodified first implanted regions 308′ and the second implanted regions310 of the silicon layer 306.

In embodiment, the ancillary impurity species used to form the modifiedfirst implanted regions 308′ inhibit the etching (e.g., slow the etchrate of) the modified first implanted regions 308′. In one suchembodiment, the ancillary implanted species are employed to affect etchselectivity and are intentionally implanted at lower energies to achieveshallower distributions (e.g., near the surface). In an embodiment, theregions 310 are etch-resistant as formed.

In an embodiment, the remaining non-implanted regions 312 of the siliconlayer 306 are removed with a hydroxide-based wet etchant that furtherremoves exposed portions of the thin oxide layer 304 and forms trenches314 into the substrate 302. The trenches may be formed to providetexturized portions of the substrate 302 as trench bottoms. In anembodiment, since the positioning of trenches 314 is determined by thefirst implanted regions 308′ and the second implanted regions 310 of thesilicon layer 306, the trenches 314 are formed as self-aligned betweenthe first implanted regions 308′ and the second implanted regions 310 ofthe silicon layer 306, as is depicted in FIG. 3E. In one embodiment, thehydroxide-based wet etchant treatment is followed by a hydrofluoricacid/ozone (HF/O₃) wet clean treatment.

It is to be appreciated that the timing of the texturizing of lightreceiving surface 301 and self-aligned trench 314 formation may vary.For example, in one embodiment, the texturizing of light receivingsurface 301 is performed in a separate process preceding theformation/texturizing of trenches 314, as is represented in FIGS. 3A-3G.However, in another embodiment, the texturizing of light receivingsurface 301 is performed in a same process as the formation/texturizingof trenches 314. Furthermore, the timing of formation/texturizing oftrenches 314 may vary relative to an anneal process used to crystallizethe first implanted regions 308′ and the second implanted regions 310.For example, in one embodiment, formation/texturizing of trenches 314 isperformed in the process used to remove the remaining non-implantedregions 312 of the silicon layer 306, as is depicted in FIG. 3E.However, in another embodiment, formation/texturizing of trenches 314 isperformed following removal of the remaining non-implanted regions 312of the silicon layer 306 and subsequent anneal process. In anembodiment, a texturized surface (whether in trench 314 or at surface301) may be one which has a regular or an irregular shaped surface forscattering incoming light, decreasing the amount of light reflected offof the light-receiving and/or exposed surfaces of the solar cell.

Referring again to FIG. 1C and now to corresponding operation 210 offlowchart 200, the method of fabricating an emitter region of a solarcell also includes annealing the semiconductor substrate to form anemitter region of the second conductivity type from the remainingnon-scribed portions 104′ of the implanted region 104 of thesemiconductor layer 102 and to form a region of dopant impurity atoms ofthe second conductivity type in the semiconductor substrate below theemitter region. In an embodiment, annealing the semiconductor substrateprovides an approximately Gaussian distribution of dopant impurity atomsof the second conductivity type in the semiconductor substrate below theimplanted region of the semiconductor layer, where a maximumconcentration of the approximately Gaussian distribution of dopantimpurity atoms of the second conductivity type is approximately in thecenter of the implanted region of the semiconductor layer, as isdescribed in greater detail below in association with FIG. 4.

In a particular embodiment, FIG. 3F illustrates a cross-sectional viewillustrating a particular example of FIG. 1C and operation 210 where thefirst implanted regions 308′ and the second implanted regions 310 of thesilicon layer 306 are annealed to form doped polycrystalline siliconemitter regions 316 and 318, respectively. In an embodiment, theannealing is performed at a temperature approximately in the range of850-1100 degrees Celsius for a duration approximately in the range of1-100 minutes. In an embodiment, a light phosphorous dopant drive isperformed during the heating or annealing. Additional embodiments caninclude formation of a passivation or anti-reflective coating layer 320on the light-receiving surface 301, an example of which is shown in FIG.3G, described below.

It is to be appreciated that the diffusion regions 398 and 399 describedabove may be formed at the time of implant (as was described above) ormay form (or may be enhanced) during the anneal of operation 210.Additionally, it is to be appreciated that, while it may be generallymost advantageous to complete the etch (i.e. removal) of non-implantedareas of silicon layer 306 prior to performing a high temperature annealand activation process, as is described above, certain implantconditions may result in intrinsically higher reactivity in thetexturizing etch (e.g., as relative to non-implanted regions). In such acase, a high temperature anneal can be performed prior to trench etch.

Whether the final dopant profile in a substrate is determined by ionimplant, by the post implant anneal or by both, FIG. 4 is a schematicillustrating a Gaussian profile associated with an ion implant process(implant or implant and anneal), in accordance with an embodiment of thepresent disclosure. Referring to FIG. 4, a substrate 400 is subjected toion implant 404 through an overlying mask 402. A dopant implant region408 results in the substrate. Since the dose profile 408 of the ionimplant 404 has a Gaussian profile 406, and associated Gaussian profileof the diffusion region 408 results with central higher concentrationregion 410 and outer lower concentration regions 412. In one suchembodiment, the regions 412 have a dopant impurity concentration ofapproximately 8E18, while the region 410 has a dopant impurityconcentration of approximately 1E17, as is depicted in FIG. 4.

To further exemplify the concepts described herein, FIG. 5A illustratesa cross-sectional view of a region of a solar cell along a length of asegment 104′ of an emitter region of FIG. 1C, in accordance with anembodiment of the present disclosure. FIG. 5B illustrates across-sectional view of a region of a solar cell along a scribed width108′ between segments 104′ of an emitter region of FIG. 1C, inaccordance with an embodiment of the present disclosure. Referring toFIGS. 5A and 5B, a substrate 500 has a portion of an emitter regionsegment 104′ (e.g., P-type with approximately 5E19 concentration, in oneembodiment) formed on a thin dielectric 502 formed on the substrate 500.A dopant region 504 (e.g., N-type) of the substrate 500 is shown nearthe surface of the substrate 500, including near a texturized surface506 of the substrate 500.

Referring only to FIG. 5A, trench 106′ is shown along the long side ofthe segment 104′ which has a corresponding diffusion region 508 (e.g.,P-type) of approximately 1E17 concentration, in one embodiment. Aninterface 509 of the diffusion region 508 along the long side of thesegment 104′ is not abrupt or substantially vertical. By contrast,referring only to FIG. 5B, gap 108′ is shown between adjacent segments104′ of a given line. At the location shown, segment 504′ has acorresponding diffusion region 510 (e.g., P-type) of approximately 8E18concentration. An interface 511 is described as abrupt or assubstantially vertical.

Referring now to FIG. 3G, in an embodiment, conductive contacts areformed on the remaining non-scribed portions of the implanted region ofthe semiconductor layer. For example, conductive contacts 322 and 324are fabricated to contact the first 316 and second 318 dopedpolycrystalline silicon emitter regions, respectively. In an embodiment,the contacts are fabricated by first depositing and patterning aninsulating layer 340 to have openings and then forming one or moreconductive layers in the openings. In an embodiment, the conductivecontacts 322 and 324 include metal and are formed by a deposition,lithographic, and etch approach or, alternatively, a printing process.

It is to be appreciated that a finalized solar cell may be fabricatedusing the above described processing operations. For example, withreference again to FIGS. 1C, 3G, 5 and 5B, in an exemplary embodiment, aback contact solar cell includes an N-type single crystalline siliconsubstrate 302 having a light-receiving surface 301 and a back surface.Alternating continuous N-type emitter regions 316 and segmented P-typeemitter regions 104′/318 are disposed on the back surface of the N-typesingle crystalline silicon substrate 302, with gaps 108′ betweensegments 104′ of the segmented P-type emitter regions 318. Trenches106′/314 are included in the N-type single crystalline silicon substrate302 between the alternating continuous N-type emitter regions 316 andsegmented P-type emitter regions 104′/318 and in locations of the gaps108′ between segments 104′ of the segmented P-type emitter regions 318.An approximately Gaussian distribution 408 of P-type dopants is includedin the N-type single crystalline silicon substrate 302 below thesegmented P-type emitter regions 104′/318. A maximum concentration ofthe approximately Gaussian distribution 408 of P-type dopants isapproximately in the center of each of the segmented P-type emitterregions 104′/318 between first and second sides of each of the segmentedP-type emitter regions 104′/318. Substantially vertical P/N junctions511 are included in the N-type single crystalline silicon substrate 302at the trenches 108′ formed in locations of the gaps between segments104′ of the segmented P-type emitter regions 104′/318.

In an embodiment, the trenches 106′/108′/314 in the N-type singlecrystalline silicon substrate 302 are texturized trenches. In anembodiment, the back contact solar cell further includes a passivationlayer disposed in the trenches 108′ in locations of the gaps between thesegmented P-type emitter regions, as is described in greater detailbelow in association with FIG. 7A. In an embodiment, the back contactsolar cell further includes conductive contacts disposed along theN-type emitter regions and disposed along the segmented P-type emitterregions, as is described in greater detail below in association withFIGS. 7A and 7B. In one such embodiment, the gaps between segments ofthe segmented P-type emitter regions have a spacing of approximately 30microns, and the conductive contacts disposed along the segmented P-typeemitter regions have a spacing of approximately 60 microns along thesegmented P-type emitter regions.

In an embodiment, the P-type dopants used to form the segmented P-typeemitter regions 104′/318 are boron dopants, and the N-type emitterregions include phosphorous dopants and an ancillary impurity speciesselected from the group consisting of nitrogen atoms, carbon atoms, andoxygen atoms. In an embodiment, the alternating continuous N-typeemitter regions and segmented P-type emitter regions disposed on theback surface of the N-type single crystalline silicon substrate form aone-dimensional interdigitated finger pattern. It is to be appreciatedthat, in accordance with another embodiment, the solar cell may insteadinclude continuous P-type emitter regions 318 and segmented N-typeemitter regions 316 disposed on the back surface of the N-type singlecrystalline silicon substrate 302. In yet another embodiment, the solarcell includes segmented P-type emitter regions 318 and segmented N-typeemitter regions 316 disposed on the back surface of the N-type singlecrystalline silicon substrate 302.

To demonstrate some of the concepts involved with embodiments describedherein, FIG. 6A is an optical image 600 of a plan view showing the gap108′ between adjacent segments 104′ of an emitter region of FIG. 1C, inaccordance with an embodiment of the present disclosure. FIG. 6B is ascanning electron microscope (SEM) image 650 showing a laser scribededge 652 and a non-laser scribed edge 654 of an emitter region of asolar cell for comparative purposes, in accordance with an embodiment ofthe present disclosure.

It is to be appreciated that breaking continuity of an ion implantedregion can involve formation of totally isolated segments, or caninvolve some level of lesser disruption to the pattern. In a firstexample, FIG. 7A illustrates a plan view of an emitter line having nocontinuity between segments of the emitter line, in accordance with anembodiment of the present disclosure. Referring to FIG. 7A, a singleemitter line 700 includes segments 702 that are completely isolated fromone another (e.g., the scribe is formed entirely through the width ofthe line 700). Contacts 704 may ultimately be formed along the segments702, as is depicted in FIG. 7A. Also, isolation material regions 706(such as silicon nitride regions) may be included between segments 702.

In a second example, FIG. 7B illustrates a plan view of an emitter linehaving continuity between segments of the emitter line, in accordancewith an embodiment of the present disclosure. Referring to FIG. 7B, asingle emitter line 750 includes segments 752 that are not completelyisolated from one another (e.g., the scribe is not formed entirelythrough the width of the line 750 and continuity portions 753 areretained). Contacts 754 may ultimately be formed along the segments 752,as is depicted in FIG. 7B. In an embodiment, although not shown,isolation material regions (such as silicon nitride regions) may beincluded between the segments 752, as was described in association withFIG. 7A.

Referring to both FIGS. 7A and 7B, in either case, in an embodiment, thegaps between segments 702 or 752 of the emitter lines 700 or 750,respectively, have a spacing between adjacent segments of approximately30 microns. In one such embodiment, the conductive contacts 704 or 754,respectively, along the segmented emitter regions are formed at aspacing of approximately 60 microns along the segmented emitter regions.

As discussed above in association with FIGS. 3A-3G, etch resistance maybe provided by both N-type and P-type regions or lines in a siliconlayer. One or both of the types of lines may be cut using a laserscribing process. As an example, FIG. 8 is a flowchart 800 listingoperations in another method of fabricating a solar cell, in accordancewith an embodiment of the present disclosure.

Referring to operation 802 of flow chart 800, a method of fabricatingalternating N-type and P-type emitter regions of a solar cell includesforming a silicon layer above an N-type single crystalline siliconsubstrate, an example of which was described above in association withFIG. 3A. In an embodiment, forming the silicon layer includes forming asilicon layer having a thickness approximately in the range of 250-300nanometers.

Referring to operation 804 of flow chart 800, the method of fabricatingalternating N-type and P-type emitter regions of a solar cell alsoincludes forming, by ion implantation, alternating N-type and P-typelines in the silicon layer with non-implanted regions of the siliconlayer remaining between the alternating N-type and P-type lines, anexample of which was described above in association with FIGS. 3B-3D.

In an embodiment, the P-type lines are formed by ion implanting boron,and the N-type lines are formed by ion implanting phosphorous and anancillary impurity species selected from the group consisting ofnitrogen atoms, carbon atoms, and oxygen atoms. In an embodiment,forming the alternating N-type and P-type lines in the silicon layer byion implantation includes using one or more one-dimensional shadow masksto form a one-dimensional interdigitated finger pattern.

Referring to operation 806 of flow chart 800, the method of fabricatingalternating N-type and P-type emitter regions of a solar cell alsoincludes breaking a continuity of the P-type lines using a laserscribing process to remove portions of the P-type lines and leaveremaining segmented P-type lines with gaps between segments of theP-type lines, an example of which was described above in associationwith FIG. 1B. In another embodiment, the method involves breaking acontinuity of the N-type lines using a laser scribing process to removeportions of the N-type lines and leave remaining segmented N-type lineswith gaps between segments of the N-type lines. In yet anotherembodiment, the method includes breaking a continuity of both the P-typeand the N-type lines using a laser scribing process to remove portionsof the P-type and N-type lines and leave remaining segmented P-type andsegmented N-type lines with gaps between segments of the P-type linesand between segments of the N-type lines.

In an embodiment, as mentioned above, the silicon layer is formed to athickness approximately in the range of 250-300 nanometers. In one suchembodiment, and breaking the continuity of the P-type lines includeslaser scribing to a depth of at least approximately 100 nanometers inthe silicon layer.

Referring to operation 808 of flow chart 800, the method of fabricatingalternating N-type and P-type emitter regions of a solar cell alsoincludes etching to remove the non-implanted regions of the siliconlayer remaining between the alternating N-type and P-type lines and inthe gaps, the etching forming trenches in the N-type single crystallinesilicon substrate between the alternating N-type and P-type lines (anexample of which was described above in association with FIG. 3E) and inlocations of the gaps between segments of the P-type lines (an exampleof which for P-type was described above in association with FIG. 1C).

In an embodiment, forming trenches in the N-type single crystallinesilicon substrate between the alternating N-type and P-type lines and inlocations of the gaps between segments of the segmented P-type linesinvolves forming texturized trenches, and example of was which describedabove in association with FIGS. 5A and 5B. In one embodiment, formingtrenches in the N-type single crystalline silicon substrate between thealternating N-type and P-type lines and in locations of the gaps betweensegments of the P-type lines involves using a hydroxide-based wetetchant.

Referring to operation 808 of flow chart 800, the method of fabricatingalternating N-type and P-type emitter regions of a solar cell alsoincludes, subsequent to the etching, annealing the N-type singlecrystalline silicon substrate to form N-type emitter regions from theN-type lines and segmented P-type emitter regions from the segmentedP-type lines, an example of which was described above in associationwith FIG. 3F.

In an embodiment, annealing the N-type single crystalline siliconsubstrate further includes forming an approximately Gaussiandistribution of P-type dopants in the N-type single crystalline siliconsubstrate, below the segmented P-type emitter regions, an example ofwhich was described above in association with FIG. 4. In one suchembodiment, a maximum concentration of the approximately Gaussiandistribution of P-type dopants is approximately in the center of each ofthe segmented P-type emitter regions between first and second sides ofeach of the segmented P-type emitter regions. In an embodiment,annealing the N-type single crystalline silicon substrate formssubstantially vertical P/N junctions in the N-type single crystallinesilicon substrate at the trenches formed in locations of the gapsbetween segments of the P-type lines, an example of which was describedabove in association with FIG. 5B.

In an embodiment, the method of flowchart 800 further includes forming apassivation layer in the trenches in locations of the gaps between thesegmented P-type emitter regions, an example of which was describedabove in association with FIG. 7A. In an embodiment, the method furtherincludes forming conductive contacts along the N-type emitter regionsand along the segmented P-type emitter regions, examples of which weredescribed above in association with FIGS. 7A and 7B. In a specific suchembodiment, breaking the continuity of the P-type lines (and/or N-typelines) includes forming the gaps between segments of the P-type lines tohave a spacing between adjacent segments of approximately 30 microns,and forming conductive contacts along the segmented P-type emitterregions includes forming conductive contacts at a spacing ofapproximately 60 microns along the segmented P-type emitter regions.

In another aspect, FIG. 9 schematically illustrates a cross-sectionalview of an inline platform for patterned implant involving a travelingwafer and stationary shadow mask, in accordance with an embodiment ofthe present disclosure. Such an inline platform may be used to performone or more of the ion implanting operations described above.

Referring to FIG. 9, an inline platform 900 includes a wafer inputregion for an input wafer having a layer of silicon, such as layer 306described above in association with FIG. 3A. A first station 950 isconfigured to implant dopant impurity atoms of a first conductivity typethrough a first shadow mask and into first regions of a material layer306 disposed above a substrate. A second station 952 is configured toimplant ancillary impurity species through a second shadow mask and intothe first regions of the material layer 306. A third station 954 isconfigured to implant dopant impurity atoms of a second, different,conductivity type through a third shadow mask and into second,different, regions of the material layer 306. In a particularembodiment, as exemplified by the output wafer of FIG. 9, the firststation 950 is configured to implant phosphorous (or, alternatively,arsenic atoms) or ions, the third station 954 is configured to implantboron atoms or ions, and the second station 952 is configured to implantnitrogen atoms or ions (or, alternatively, carbon atoms or ions, oroxygen atoms or ions).

Referring again to FIG. 9, a stationary stencil mask 902, such as astationary graphite mask, is held in proximity to, but not in contactwith, the substrate during implantation. Although shown as one mask withthree corresponding slit patterns, it is to be appreciated that anindividual shadow mask will typically be used for each of the modules950, 952 and 954. The usable distance for spacing from the receivingsubstrate may be determined by the degree to which the ion beam can becollimated. A typical spacing may be between 50-250 microns which isroughly the same order of thickness as a Si solar wafer substrate.However, the spacing may be as high a 1000 microns (1 mm) underconditions which minimize the angle of divergence (from vertical) belowthe lower edge of the shadow mask. In an embodiment, the resultingpattern of implanted regions is a one-dimensional interdigitated fingerpattern. In other embodiments, a silicon shadow mask is used.

In an embodiment, as described above, a stencil mask such as astationary graphite shadow mask may be used for implantation. As anexample, FIG. 9 schematically illustrates a possible inline platform forpatterned implant involving stationary shadow masks, in accordance withan embodiment of the present disclosure. In either of the abovedescribed cases, in an embodiment, some deposition or residueaccumulation may occur on the stencil masks. After numerous runs, suchdeposition or accumulation may require removal from the masks. It is tobe appreciated that an optimal number of runs may be determined tobalance throughput against an over-accumulation of material on thestencil mask that could in some way impact later implantation processes.In one such embodiment, after a certain number of runs, the accumulatedmaterial is removed by selective etching, and the stencil mask can thenbe reused.

Thus, the introduction of new high throughput ion implant toolstargeting high efficiency solar applications with patterningcapabilities may be applicable to the fabrication of interdigitated backcontact (IBC) solar cells. In particular, in cases where physical andchemical changes are associated with performing ion implant operations,such implantation can be exploited to permit the formation of aself-aligned trench pattern.

Overall, although certain materials are described specifically above,some materials may be readily substituted with others with other suchembodiments remaining within the spirit and scope of embodiments of thepresent disclosure. For example, in an embodiment, a different materialsubstrate, such as a group material substrate, can be used instead of asilicon substrate. In another embodiment, a polycrystalline ormulti-crystalline silicon substrate is used. Furthermore, it is to beunderstood that, where the ordering of N+ and then P+ type doping isdescribed specifically for emitter regions on a back surface of a solarcell, other embodiments contemplated include the opposite ordering ofconductivity type, e.g., P+ and then N+ type doping, respectively.Additionally, although reference is made significantly to back contactsolar cell arrangements, it is to be appreciated that approachesdescribed herein may have application to front contact solar cells aswell. In general, embodiments described herein may be implemented toprovide lower cost, high throughput ion implant platforms for thefabrication of high efficiency interdigitated back contact (IBC)-typesolar cells. Specific embodiments can offer an advantageous approach forgenerating self-aligned trenches among emitter regions formed byimplantation. In other embodiments, the above described approaches canbe applicable to manufacturing of other than solar cells. For example,manufacturing of light emitting diode (LEDs) may benefit from approachesdescribed herein.

Thus, solar cell fabrication using laser patterning of ion-implantedetch-resistant layers, and the resulting solar cells, have beendisclosed.

Although specific embodiments have been described above, theseembodiments are not intended to limit the scope of the presentdisclosure, even where only a single embodiment is described withrespect to a particular feature. Examples of features provided in thedisclosure are intended to be illustrative rather than restrictiveunless stated otherwise. The above description is intended to cover suchalternatives, modifications, and equivalents as would be apparent to aperson skilled in the art having the benefit of the present disclosure.

The scope of the present disclosure includes any feature or combinationof features disclosed herein (either explicitly or implicitly), or anygeneralization thereof, whether or not it mitigates any or all of theproblems addressed herein. Accordingly, new claims may be formulatedduring prosecution of the present application (or an applicationclaiming priority thereto) to any such combination of features. Inparticular, with reference to the appended claims, features fromdependent claims may be combined with those of the independent claimsand features from respective independent claims may be combined in anyappropriate manner and not merely in the specific combinationsenumerated in the appended claims.

1.-18. (canceled)
 19. A solar cell, comprising: a substrate having alight-receiving surface and a back surface; continuous emitter regionsof a first conductivity type and rectangularly segmented emitter regionsof a second conductivity type disposed on the back surface of thesubstrate, the continuous emitter regions separate from therectangularly segmented emitter regions, with gaps between segments ofthe rectangularly segmented emitter regions; an isolation materialregion located at the gaps between segments of the rectangularlysegmented emitter regions; and an oxide layer coextensive with eachcontinuous emitter regions and each segment of the rectangularlysegmented emitter regions, each oxide layer between the back surface ofsubstrate and the corresponding continuous emitter region orcorresponding segment of the rectangularly segmented emitter regions.20. The solar cell of claim 19, wherein the isolation material regioncomprises silicon nitride.
 21. The solar cell of claim 19, wherein thecontinuous emitter regions comprise doped polycrystalline siliconemitter regions.
 22. The solar cell of claim 19, wherein therectangularly segmented emitter regions comprise doped polycrystallinesilicon emitter regions.
 23. The solar cell of claim 19, wherein thecontinuous emitter regions comprise phosphorous.
 24. The solar cell ofclaim 19, wherein the continuous emitter regions comprise arsenic. 25.The solar cell of claim 19, wherein the rectangularly segmented emitterregions comprise boron.
 26. The solar cell of claim 19, wherein the gapsbetween segments of the rectangular segmented emitter regions haveapproximately Gaussian distribution of the second conductivity type inthe substrate below each of the rectangularly segmented emitter regions,wherein a maximum concentration of the approximately Gaussiandistribution of second conductivity is approximately in the center ofeach of the rectangularly segmented emitter regions between first andsecond sides of each of the rectangularly segmented emitter regions. 27.A solar cell, comprising: a substrate having a light-receiving surfaceand a back surface; continuous emitter regions of a first conductivitytype and rectangularly segmented emitter regions of a secondconductivity type disposed on the back surface of the substrate, thecontinuous emitter regions separate from the rectangularly segmentedemitter regions, with gaps between segments of the rectangularlysegmented emitter regions; a continuity portions located at the gapsbetween segments of the rectangularly segmented emitter regions, whereinthe continuity portions electrically connect the rectangularly segmentedemitter regions; and an oxide layer coextensive with each continuousemitter regions and each segment of the rectangularly segmented emitterregions, each oxide layer between the back surface of substrate and thecorresponding continuous emitter region or corresponding segment of therectangularly segmented emitter regions.
 28. The solar cell of claim 27,further comprising: an isolation material region located at the gapsbetween segments of the rectangularly segmented emitter regions.
 29. Thesolar cell of claim 28, wherein the isolation material region comprisessilicon nitride.
 30. The solar cell of claim 27, wherein the continuousemitter regions comprise doped polycrystalline silicon emitter regions.31. The solar cell of claim 27, wherein the rectangularly segmentedemitter regions comprise doped polycrystalline silicon emitter regions.32. The solar cell of claim 27, wherein the continuous emitter regionscomprise phosphorous.
 33. The solar cell of claim 27, wherein the gapsbetween segments of the rectangularly segmented emitter regions haveapproximately Gaussian distribution of a second conductivity type in thesubstrate below each of the rectangularly segmented emitter regions,wherein a maximum concentration of the approximately Gaussiandistribution of second conductivity is approximately in the center ofeach of the rectangularly segmented emitter regions between first andsecond sides of each of the rectangularly segmented emitter regions. 34.A method of fabricating an emitter region of a solar cell, the methodcomprising: forming a semiconductor layer above a semiconductorsubstrate of a first conductivity type; implanting dopant impurity atomsof a second conductivity type in the semiconductor layer to form animplanted region of the semiconductor layer and resulting in anon-implanted region of the semiconductor layer; laser scribing at leastan uppermost portion of the implanted region of the semiconductor layerto form scribe lines in the implanted region of the semiconductor layer;removing the non-implanted region of the semiconductor layer andremaining portions of the semiconductor layer in the scribe lines usinga selective etch process preserving remaining non-scribed portions ofthe implanted region of the semiconductor layer; and annealing thesemiconductor substrate to form an emitter region of the secondconductivity type from the remaining non-scribed portions of theimplanted region of the semiconductor layer and to form a region ofdopant impurity atoms of the second conductivity type in thesemiconductor substrate below the emitter region.
 35. The method ofclaim 34, wherein annealing the semiconductor substrate comprisesforming an approximately Gaussian distribution of dopant impurity atomsof the second conductivity type in the semiconductor substrate below theimplanted region of the semiconductor layer, wherein a maximumconcentration of the approximately Gaussian distribution of dopantimpurity atoms of the second conductivity type is approximately in thecenter of the implanted region of the semiconductor layer.
 36. Themethod of claim 35, wherein annealing the semiconductor substrate formssubstantially vertical P/N junctions in the semiconductor in locationsof the scribe lines.
 37. The method of claim 34, wherein removingcomprises forming trenches in the semiconductor substrate in locationsbelow the non-implanted region of the semiconductor layer and inlocations below the scribe lines.
 38. The method of claim 37, whereinforming the trenches in the semiconductor substrate comprises using ahydroxide-based wet etchant.